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In this work, memory devices integrating a double layer of silicon nanocrystals as trapping medium and a high-k HfAlO-based control dielectric are presented. We will show that the use of two stacked Si-nc layers significantly improves the memory window compared to the single Si-nc layer devices, without introducing dispersions on the charging dynamics. Then, we also evaluate the potentiality of hybrid Si-nc double layer/SiN layer charge trapping media. These devices show a good memory window and good retention (>3 V after 10 years) with small activation energy (0.35 eV up to 200degC), thus being promising for future high-temperature memory applications.
Publication date: 
10 May 2009

G Gay, G Molas, M Bocquet, E Jalaguier, M Gely, L Masarotto, JP Colonna, H Grampeix, F Martin, P Brianceau, V Vidal, R Kies, K Yckache, B De Salvo, G Ghibaudo, T Baron, C Bongiorno, S Lombardo

Biblio References: 
Pages: 1-4
2009 IEEE International Memory Workshop