Amorphous silicon solar cells were deposited on porcelain stoneware tiles in order to develop a fully integrated PV building element. In a previous work we demonstrated the feasibility of adopting porcelain stoneware tiles as thin-film solar cell substrates and we fabricated 1× 1 cm 2 solar cells on “industrial-level” ceramic substrates showing more than 4% efficiency. In this study we focus our attention on larger area (7 cm 2) devices deposited on 100 cm 2 tiles. As the active area increases additional problems arise from the surface of the substrate. In particular we find that short-circuit paths originate from the unfavorable properties of the substrate tiles (roughness, porosity, etc.) having dramatic consequences on the performance of larger area devices. With the assumption that spot-like regions, in which the back layer and the front layer are in electrical contact (local short-circuits), are present all over the device, we …