Type:
Conference
Description:
This paper presents the technological process and electrical behaviour of SONOS FinFlash devices fabricated on silicon-on-insulator (SOI) substrates and including HfO 2 in the inter poly dielectric (IPD). Using trimming techniques, ultra-scaled devices were processed with aggressive dimensions down to 10 nm channel width and 30 nm gate length. Good performances are obtained in Fowler-Nordheim (FN) operation on these structures.
Publisher:
IEEE
Publication date:
18 May 2008
Biblio References:
Pages: 106-108
Origin:
2008 Joint Non-Volatile Semiconductor Memory Workshop and International Conference on Memory Technology and Design